RAND

Yehia Massoud received his PhD degree in Electrical Engineering and Computer Science from the Massachusetts Institute of Technology in 1999. He was a member of the Technical Staff at the Advanced Technology Group at Synopsys Inc., Mountain View, CA from 1999 to 2003, where he recieved the Synopsys Special Recognition Engineering Award. He joined Rice University in July 2003, where he is the founding director of the Rice Automated Nanoscale Design Group (RAND) and an Associate Professor in the Electrical and Computer Engineering, Computer Science, and Applied Physics departments at Rice University. He is also the theme leader for Novel Interconnects and Architectures in the Southwest Academy of Nanoelectronics (SWAN), which is funded by the SRC Nanoelectronics Research Initiative.

He currently serves as the General Co-Chair of the 2009 ACM Great Lakes Symposium on VLSI (GLSVLSI). He is also an Associate Editor of the IEEE Transactions on Very Large Scale Integration Systems (TVLSI) and an Associate Editor of the IEEE Transactions on Circuits and Systems I (TCAS-I). He also serves on the Editorial board of the Journal of Circuits, Systems, and Computers. He has served as the Technical Program Co-Chair of the 2007 ACM Great Lakes Symposium on VLSI. He has chaired or co-chaired conference tracks in several IEEE/ACM international conferences, such as the design automation track in ISCAS 2007,ISCAS 2008, ISCAS 2009, the VLSI Design track in GLSVLSI 2006, and the emerging technologies track in ISVLSI 2009. He has also served on the technical program committees of many of the key conferences in Electronic Design Automation, VLSI, and Nanotechnology, such as ICCAD, ISCAS, DATE, ISQED.

Dr. Massoud leads research efforts targeting the modeling and design of innovative circuits, systems, and interconnect based on both carbon nanotubes and nanophotonic structures. Dr. Massoud leads parallel research efforts targeting variability-aware optimization, modeling, and automated synthesis techniques for analog/RF/Mixed signal circuits and systems as well as methodologies for interconnect-centric Network-on-Chip and thermally-aware design. He has published more than 150 papers in peer reviewed journal and conferences. He is a recipient of the National Science Foundation CAREER Award for 2004, the Synopsys Special Recognition Engineering Award, several Best Paper Award Nominations, and the Best Paper Award at the 2007 IEEE International Symposium on Quality Electronic Design.