RAND

For on-chip communication, optical interconnect has the potential to enable the high-speed transmission of large quantities of information with minimal delay and cross-talk noise. However, conventional optical waveguides cannot confine light beyond half the effective wavelength due to the diffraction limit, which hinders the nanoscale integration of optical interconnect and devices. Therefore, subwavelength optical interconnect solutions are required to enable the realization of on-chip optical communication in future nanoscale integrated circuits. Progress in nanoscale fabrication and characterization techniques has generated increasing interest in surface plasmon-polaritons (SPPs) as a solution for overcoming the diffraction limit in optical interconnect applications. The modeling and design of subwavelength waveguides and optical components is crucial for the realization of on-chip optical communication in future nanoscale integrated circuits. Our research is focused in the following areas:

• Efficient Modeling and Design of On-Chip Subwavelength Plasmonic Waveguides
• Tunable On-Chip Subwavelength Optical Filters using Omnidirectional Resonant Microcavities
• Equivalent RLC Circuit Model for Metallic Nanoparticles

Several theoretical and experimental studies on plasmonic structures indicate the possibility of low-loss propagation, strong localization, low-loss transmission through sharp bends, single mode propagation, and the excitation of plasmonic waveguides through coupling with optical fiber and dielectric waveguides. While these studies demonstrate the potential for subwavelength optical interconnect solutions for future nanoscale integrated circuits, the modeling and design of plasmonic waveguides remains an important challenge that must be addressed. For planar plasmonic waveguides, we have created an efficient full-vector-finite difference field solver. The method has low computational complexity and can be applied to accurately model complex geometries and structures with fast varying field profiles (Figure 1). Leveraging the developed finite-difference field solver, we have created an efficient method for optimizing the geometry of dielectric strip plasmonic waveguides for subwavelength on-chip optical communication in future nanoscale integrated circuits. Using the optimization method, we demonstrate that a dielectric strip embedded in a metallic medium can support single-mode propagation while simultaneously achieving low loss and high light confinement. Our research facilitates the modeling and design of plasmonic waveguide designs with low loss and high spatial confinement, which are crucial for the realization of subwavelength on-chip optical communication.

Figure 1: Field profiles of first four low loss fundamental modes for a dielectric strip plasmonic waveguide calculated using the efficient field solver

Photonic devices with subwavelength light confinement are the building blocks for future highly integrated photonic circuits. To facilitate integrated subwavelength optical communication, we have developed a technique to achieve tunable omnidirectional resonance in planar metallic microcavity structures, which can be used to realize tunable filters in the optical frequency range. In planar plasmonic waveguides based on the metal-insulator-metal (MIM) geometry, the dielectric thickness is designed to cause the plasmonic structure to act as a high-pass filter with a cut-off at the surface plasmon frequency associated with dielectric and metallic materials. To facilitate a wide-range of possible cut-off frequencies, we employ a stack of different dielectric layers that exhibit the desired effective dielectric constant. We tune the cut-off frequency of the filter by changing the thickness of each dielectric layer. Figures 2 (a)-(b) show the FDTD simulation results for an MIM structure consisting of silver and silicon with a dielectric thickness of 32 nm. The cut-off wavelength is about 475 nm. Figures 2 (c)-(d) show the results for the structure when 70% of the dielectric thickness is filled with air. The new cut-off frequency, 315nm, is verified using FDTD simulation.

Figure 2: FDTD simulation of the field profile associated with (a,b) Ag-Si-Ag and (c,d) Ag-Si-air-Ag MIM structures. (a) l= 485nm, (b) l= 450nm, (c) l= 330nm, (d) l= 300nm.

The modeling and characterization of fundamental phenomena such as the resonance and transmission of energy in nanostructures continues to pose limitations on developing innovative on-chip plasmonic solutions. For the theoretical analysis of complex nanostructures prior to fabrication, the absence of accurate closed-form characterization solutions has spurred the need for innovative theoretical modeling techniques. We have created a new RLC modeling technique for metallic nanoparticles, which could be used as a basic building block to develop equivalent circuit models for plasmonic waveguides. The modeling technique generates RLC circuit representations for the plasmonic oscillations in metallic nanoparticles under the influence of an external electromagnetic field. The developed models utilize spherical wave functions to describe the field, which can be used to generate equivalent RLC ladder circuit realizations. Figure 3 shows an RLC Ladder network circuit representing one of the coefficients of admittance rational function. Our simulation results show that these RLC models closely match with the exact solutions provided by Mie theory and field solver simulations. Our newly developed models can be used as basic building blocks to develop an equivalent circuit model for metallic nanoparticle-based plasmonic waveguides containing a large number of coupled nanoparticles.

Figure 3: RLC Ladder network circuit for one of the coefficients of admittance rational function of a metallic nanoshell.